CS 433
CS 433 - Computer System Organization
Fall 2025
| Title | Rubric | Section | CRN | Type | Hours | Times | Days | Location | Instructor |
|---|---|---|---|---|---|---|---|---|---|
| Computer System Organization | CS433 | CSP | 79901 | PKG | 3 | 1230 - 1345 | R | ARR Illini Center | Saugata Ghose |
| Computer System Organization | CS433 | CSP | 79901 | PKG | 3 | 1230 - 1345 | T | Saugata Ghose | |
| Computer System Organization | CS433 | MCS | 36076 | PKG | 4 | 1230 - 1345 | R | ARR Illini Center | Saugata Ghose |
| Computer System Organization | CS433 | MCS | 36076 | PKG | 4 | 1230 - 1345 | T | Saugata Ghose | |
| Computer System Organization | CS433 | T3 | 36069 | LCD | 3 | 1230 - 1345 | T R | 157 Noyes Laboratory | Saugata Ghose |
| Computer System Organization | CS433 | T4 | 43363 | LCD | 4 | 1230 - 1345 | T R | 157 Noyes Laboratory | Saugata Ghose |
| Computer System Organization | CSE422 | CSP | 79902 | PKG | 3 | 1230 - 1345 | T | Saugata Ghose | |
| Computer System Organization | CSE422 | CSP | 79902 | PKG | 3 | 1230 - 1345 | R | ARR Illini Center | Saugata Ghose |
| Computer System Organization | CSE422 | MCS | 36086 | PKG | 4 | 1230 - 1345 | R | ARR Illini Center | Saugata Ghose |
| Computer System Organization | CSE422 | MCS | 36086 | PKG | 4 | 1230 - 1345 | T | Saugata Ghose | |
| Computer System Organization | CSE422 | T3 | 36083 | LCD | 3 | 1230 - 1345 | T R | 157 Noyes Laboratory | Saugata Ghose |
| Computer System Organization | CSE422 | T4 | 43364 | LCD | 4 | 1230 - 1345 | T R | 157 Noyes Laboratory | Saugata Ghose |
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Official Description
Course Director
Text(s)
Computer Architecture: A Quantitative Approach, 6th Ed, by John L. Hennessy and David A. Patterson
Learning Goals
Understand design principles and methods used in contemporary processors and memory systems and apply them to new designs. (1), (2)
Evaluate the performance of a modern computer (1), (2)
Determine sources of potential performance bottlenecks in a processor design and determine techniques to address them. (1), (2)
Reason about sources of low memory system performance for a workload and determine techniques to address them (1), (2)
Evaluate tradeoffs between hardware and software techniques to achieve a performance goal (1), (2), (6)
Understand requirements for a correct parallel program and methods for supporting them in hardware. (1), (2), (6)
Topic List
Fundamental concepts related to performance, power, reliability, cost vs. price
Basic pipeline structure: some review from pre-requisite, multicyle functional units, static branch prediction, handling interrupts
Instruction-level parallelism: hardware techniques (e.g., dynamic scheduling, superscalar, dynamic branch prediction, handling precise interrupts)
Instruction-level parallelism: software-driven techniques (e.g., loop unrolling, trace scheduling, predication, memory access reordering)
Advanced concepts in cache design (e.g., prefetching, lockup-free caches, multilevel caches)
Main memory and virtual memory
Multiprocessors/multicore: parallelism models
Cache coherence: snoopy and directory solutions
Synchronization
Memory consistency models
Data parallel architectures
Required, Elective, or Selected Elective
Selected Elective.